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Yiming Li*, Han-Tung Chang, Chun-Ning Lai, Pei-Jung Chao, and Chieh-Yang Chen, “Process Variation Effect, Metal-Gate Work-Function Fluctuation and Random Dopant Fluctuation of 10-nm Gate-All-Around Silicon Nanowire MOSFET Devices,” IEEE International Electron Devices Meeting (IEEE IEDM 2015), Washington, DC, Dec. 7-9, 2015, p. 34p4 (4 pages).
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Yao-Jen Lee, Fu-Ju Hou, Shang-Shiun Chuang, Fu-Kuo Hsueh, Kuo-Hsing Kao, Po-Jung Sung, Wei-You Yuan, Jay-Yi Yao, Yu-Chi Lu, Kun-Lin Lin, Chien-Ting Wu, Hisu-Chih Chen, Bo-Yuan Chen, Guo-Wei Huang, Henry J. H. Chen, Jiun-Yun Li, Yiming Li, Seiji Samukawa, Tien-Sheng Chao3, Tseung-Yuen Tseng, Wen-Fa Wu, Tuo-Hung Hou, and Wen-Kuan Yeh, “Diamond-shaped Ge and Ge0.9Si0.1 Gate-All-Around Nanowire FETs with Four {111} Facets by Dry Etch Technology,” IEEE International Electron Devices Meeting (IEEE IEDM 2015), Washington, DC, Dec. 7-9, 2015, p. 15p1 (4 pages).
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Yao-Jen Lee, Ta-Chun Cho, Po-Jung Sung, Kuo-Hsing Kao, Fu-Kuo Hsueh, Fu-Ju Hou, Po-Cheng Chen, Hsiu-Chih Chen, Chien-Ting Wu, Shu-Han Hsu, Yi-Ju Chen, Yao-Ming Huang, Yun-Fang Hou, Wen-Hsien Huang, Chih-Chao Yang, Bo-Yuan Chen1, Kun-Lin Lin, Min-Cheng Chen, Chang-Hong Shen, Guo-Wei Huang, Kun-Ping Huang, Michael I. Current, Yiming Li, Seiji Samukawa, Wen-Fa Wu, Jia-Min Shieh, Tien-Sheng Chao, and Wen-Kuan Yeh, "High Performance Poly Si Junctionless Transistors with Sub-5nm Conformally Doped Layers by Molecular Monolayer Doping and Microwave Incorporating CO2 Laser Annealing for 3D Stacked ICs Applications,” IEEE International Electron Devices Meeting (IEEE IEDM 2015), Washington, DC, Dec. 7-9, 2015, p. 6p2 (4 pages).
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Ming-Yi Lee, Yi-Chia Tsai, Yiming Li*, and Seiji Samukawa, “Miniband Dependence on the Density of Ge/Si Quantum Dots for Solar Cell Application,” International Electron Devices and Materials Symposium (IEDMS 2015), Tainan, Taiwan, Nov. 19-20, 2015, p. C13 (2 pages).
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Chieh-Yang Chen and Yiming Li*, “Modeling Threshold Voltage Fluctuation of Multi-Fin HKMG Bulk FinFET Devices Induced by Random Dopant Fluctuation and Work Function Fluctuation,” International Electron Devices and Materials Symposium (IEDMS 2015), Tainan, Taiwan, Nov. 19-20, 2015, p. B23 (2 pages).
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Cheng-Hao Huang, Wen-Che Liu, Chieh-Yang Chen, and Yiming Li*, “Optimal Characteristic of 14-nm-Gate InGaAs Multiple-Gate MOSFET Devices,” International Electron Devices and Materials Symposium (IEDMS 2015), Tainan, Taiwan, Nov. 19-20, 2015, p. B15 (2 pages).
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Ming-Yi Lee, Yi-Chia Tsai, Yiming Li*, and Seiji Samukawa, “Energy Spectra Simulation of Neutral-Beam-Etching Fabricated Semiconductor Nanodisk,” Presented in Twelfth International Conference on Flow Dynamics, Sendai, Japan, Oct. 27-29, 2015.
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Yi-Chia Tsai, Ming-Yi Lee, Yiming Li*, and Seiji Samukawa, “Miniband Formulation in Ge/Si Quantum Dot Array,” Extended Abstracts of the 2015 International Conference on Solid State Devices and Materials (SSDM 2015), Sapporo, Japan, Sept. 27-30, 2015, pp. 882-883.
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Li-Wei Yang, Yi-Chia Tsai, Yiming Li*, Oleksandr Voskoboynikov, Aiko Higo, Akihiro Murayama, and Seiji Samukawa, “Electron g-factor Engineering in GaAs Quantum Nano-Disks Fabricated by Defect-Free Neutral Beam Etching Process,” Extended Abstracts of the 2015 International Conference on Solid State Devices and Materials (SSDM 2015), Sapporo, Japan, Sept. 27-30, 2015, pp. 430-431.
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Yi-Chia Tsai, Ming-Yi Lee, Yiming Li*, and Seiji Samukawa, “Numerical Simulation of Highly Periodical Ge/Si Quantum Dot Array for Intermediate-Band Solar Cell Applications,” 2015 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2015), Washington, DC, Sept. 9-11, 2015, pp. 68-71.
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Cheng-Hao Huang and Yiming Li*, “Electrical Characteristic of InGaAs Multiple-Gate MOSFET Devices,” 2015 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2015), Washington, DC, Sept. 9-11, 2015, pp. 357-360.
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Ming-Yi Lee, Yi-Chia Tsai, Yiming Li*, and Seiji Samukawa, Electronic Structure Dependence on the Density, Size and Shape of Ge/Si Quantum Dots Array,” The 18th IEEE International Workshop on Computational Electronics (IEEE IWCE 2015), West Lafayette, IN, Sept. 2-4, 2015 (4 pages).
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Chun-Ning Lai, Chieh-Yang Chen, and Yiming Li*, “Nanosized-Metal-Grain-Induced Characteristic Fluctuation in Gate-All-Around Si Nanowire Metal-Oxide-Semiconductor Devices,” The 18th IEEE International Workshop on Computational Electronics (IEEE IWCE 2015), West Lafayette, IN, Sept. 2-4, 2015 (4 pages).
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Yiming Li* and Chieh-Hsueh Chiang, “A Novel Pull-Down Structure for High-Performance ASG Driver Circuits,” The 15th International Meeting on Information Display (IMID 2015), EXCO, Daegu, Republic of Korea, Aug. 18-21, 2015, p. 228.
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Yi-Hsuan Hung, Sheng-Chin Hung, Chieh-Hsueh Chiang, and Yiming Li*, “TFT-Circuit-Simulation-Based Multi-objective Evolutionary Algorithm for Dynamic Specification Design Optimization of ASG Driver Circuits,” The 15th International Meeting on Information Display (IMID 2015), EXCO, Daegu, Republic of Korea, Aug. 18-21, 2015, p. 191.
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Sheng-Chin Hung, Yi-Hsuan Hung, Chieh-Hsueh Chiang, and Yiming Li*, “An Optimal ASG Driver Circuit with New Multi-Level Clock Driving Technique,” The 15th International Meeting on Information Display (IMID 2015), EXCO, Daegu, Republic of Korea, Aug. 18-21, 2015, p. 137.
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Li-Wei Yang, Chin-Min Yang, Yiming Li*, and Oleksandr Voskoboynikov, “Efficient simulation of the effective g-factor for carriers confined in semiconductor nano-objects,” Accepted by The Congress on Numerical Methods in Engineering (CMN 2015), Instituto Superior Tecnico, Lisboa, June 29-July 2, 2015, p. 259 (20 pages).
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Ming-Yi Lee, Yi-Chia Tsai, Yiming Li*, and Seiji Samukawa, “Modeling and Simulation of Well-Ordered Ge/Si-Nanodisk Array for Quantum Dot Solar Cells,” Presented in IEEE The 4th International Symposium on Next-Generation Electronics (IEEE ISNE 2015), Taipei, Taiwan, May 4-6, 2015.
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Chieh-Yang Chen, Wen-Tsung Huang, and Yiming Li*, “Electrical Characteristic and Power Consumption Fluctuations of Trapezoidal Bulk FinFET Devices and Circuits Induced by Random Line Edge Roughness,” IEEE The 16th International Symposium on Quality Electronic Design (IEEE ISQED 2015), Santa Clara, CA, March 12-14, 2015, pp. 61-64.
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Ming-Yi Lee, Yiming Li*, and Seiji Samukawa, “In-Plane 3D Miniband Calculation of Silicon Nanostructure Array for Solar Cell Applications,” 2015 The 1st International Workshop on Quantum Nanostructure; Physics and Solar Cell Applications, Miyazygi, Japan, Feb. 19-20, 2015.
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Yao-Jen Lee, T.-C. Cho, K.-H. Kao, P.-J. Sung, F.-K. Hsueh, P.-C. Huang, C.-T. Wu, S.-H. Hsu, W. -H. Huang, H.-C. Chen, Yiming Li, M. I. Current, B. Hengstebeck, J. Marino, T. Büyüklimanli, J.-M. Shieh, T.-S. Chao, W.-F. Wu, and W.-K. Yeh, “A Novel Junctionless FinFET Structure with Sub-5nm Shell Doping Profile by Molecular Monolayer Doping and Microwave Annealing,” IEEE International Electron Devices Meeting (IEEE IEDM), San Francisco, CA, Dec. 15-17, 2014, pp. 788-791.
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Sheng-Chin Hung, Chieh-Yang Chen, Chien-Hsueh Chiang, and Yiming Li*, “Circuit-Simulation-Based Multi-objective Evolutionary Algorithm with Multi-Level Clock Driving Technique for a-Si:H TFTs Gate Driver Circuit Design Optimization,” International Computer Symposium, Taichung, Taiwan, Dec. 12-14, 2014, pp. 143-152.
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Cheng-Hao Huang, and Yiming Li*, “DC/AC/RF Characteristics of III-V Trigate MOSFET Devices with In1-xGaxAs Channel Capping Layer,” International Electron Devices and Materials Symposium, Hualien, Taiwan, Nov. 20-21, 2014, p. 51.
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Pei-Jung Chao, and Yiming Li*, “Influence of Channel Aspect Ratio and Work Function Fluctuation on Gate-All-Around Silicon-Germanium Nanowire MOSFET,” International Electron Devices and Materials Symposium, Hualien, Taiwan, Nov. 20-21, 2014, pp. 39-40.
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Li-Wen Chen, and Yiming Li*, “Effect of Channel-Fin Width and Angle on Optimal Characteristic of Trapezoidal-Shaped Bulk FinFET Devices,” International Electron Devices and Materials Symposium, Hualien, Taiwan, Nov. 20-21, 2014, pp. 20-21.
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Ping-Hsun Su, and Yiming Li*, “Process Variation Characterization and Optimization to Reduce Device Performance Variability Using Ring Oscillator of 16-nm-Gate Bulk FinFETs,” Asia Conference on Nanoscience and Nanotechnology, Jeju, Korea, Oct. 27-29, 2014, pp. 386.
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Saurabh Tomar, Pei-Jung Chao, Han-Tung Chang, and Yiming Li*, “On Channel Shape Variation of 10-nm-Gate Gate-All-Around Silicon Nanowire MOSFETs,” 15th Trends in Nanotechnology International Conference, Barcelona, Spain, Oct. 27-31, 2014, pp. 137-138.
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Sheng-Chin Hung, Chien-Hsueh Chiang, and Yiming Li*, “Circuit-Simulation-Based Multi-objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits under Multi-Level Clock Driving,” 6th International Conference on Computer Aided Design for Thin-Film Transistors, Nanjing, China, Oct. 15-17, 2014, p. 59.
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Chien-Hsueh Chiang, and Yiming Li*, “Design Fabrication and Characterization of Low-Noise and High-Reliability Amorphous Silicon Gate Driver Circuit for Advanced FPD Applications,” 6th International Conference on Computer Aided Design for Thin-Film Transistors, Nanjing, China, Oct. 15-17, 2014, p. 53.
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Wen-Tsung Huang and Yiming Li*, “The Impact of Fin/Sidewall/Gate Line Edge Roughness on Trapezoidal Bulk FinFET Devices,” International Conference on Simulation of Semiconductor Processes and Devices, Yokohama, Japan, Sep. 9-11, 2014, pp. 281-284.
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Cheng-Hao Huang and Yiming Li*, “Impact of In1-xGaxAs Capping Layer on Characteristic of III-V Trigate MOSFET Devices,” International Conference on Solid State Devices and Materials, Yokohama, Japan, Sep. 8-11, 2014, pp. 634-635.
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Niraj Man Shrestha, Yuen-Yee Wang, Yiming Li*, and Edward Yi Chang, “Electrical Characteristic Simulation of Novel AlGaN/GaN Vertical HEMT with Multi-Aperture and SiO2 Current Blocking Layer,” International Conference on Solid State Devices and Materials, Tsukuba, Japan, Sep. 8-11, 2014, pp. 136-137.
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Sheng-Chin Hung, Chien-Hsueh Chiang, and Yiming Li*, “Falling-Time and Ripple Optimization of a-Si:H TFTs Gate Driver Circuit Using Circuit-Simulated-Based Multi-objective Evolutionary Algorithm with Novel 3-Level Clock Driving Methodology,” 18th Nano Engineering and Microsystem Technology Conference, Tainan, Taiwan, Aug.21-22, 2014, p. 54.
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Cheng-Hao Huang and Yiming Li*, “Electrical Characteristic of 14-nm III-V Trigate MOSFET with Various In1-xGaxAs / In0.53Ga0.47As Channel Films,” 18th Nano Engineering and Microsystem Technology Conference, Tainan, Taiwan, Aug. 21-22, 2014, p. 73.
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Pei-Jung Chao, and Yiming Li*, “Impact of Geometry Aspect Ratio on 10-nm Gate-All-Around Silicon-Germanium Nanowire Field Effect Transistors,” IEEE International Conference on Nanotechnology, Toronto, ON, Canada, Aug. 18-21 2014, pp. 452-455.
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Yiming Li* and Wen-Tsung Huang, “On Characteristic Fluctuation of Nonideal Bulk FinFET Devices,” The 6th IEEE International Nanoelectronics Conference, Sapporo, Japan, July 28-31, 2014, 165(4p).
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Shintaro Ishii, Akio Higo, Kenichi Yoshikawa, Yosuke Tamura, Takayuki Kiba, Akihiro Murayama, Yiming Li, and Seiji Samukawa, “Quantum energy levels simulation for InGaAs/GaAs Quantum Nanodisks fabricated by Ultimate Top-down Process,” The 6th IEEE International Nanoelectronics Conference, Sapporo, Japan, July 28-31, 2014, INEC0097-MS(4p).
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Han-Tung Chang, and Yiming Li*, “Random Dopant Fluctuation in 10-nm-Gate Multi-Channel Gate-All-Around Nanowire Field Effect Transistors,” NSTI Nanotechnology Conference Expo., Washington, DC, USA, Jun. 15-18, 2014, vol. 3, pp. 5-8.
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Ping-Hsun Su, and Yiming Li*, “Design Optimization of 14-nm Bulk FinFET technology via Geometric Programming,” International Workshop on Computational Electronics, Paris, France, Jun. 3-6, 2014, pp. 253-256.
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Niraj Man Shrestha, Yueh-Chin Lin, Yiming Li*, and Edward Yi Chang, “Device Simulation of P-InAlN-Gate AlGaN/GaN high electron mobility transistor,” International Workshop on Computational Electronics, Paris, France, Jun. 3-6, 2014, pp. 245-248.
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Niraj Man Shrestha, Yueh-Chin Lin, Han-Tung Chang, Yiming Li*, and Edward Yi Chang, “A Novel Enhancement Mode AlGaN/GaN HEMT with P-InAlN Gate Structure,” The 3rd International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, p. 104.
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Chieh-Yang Chen, Cheng-Hao Huang, and Yiming Li*, “Simulation of Multi-Fin Bulk FinFET Devices Induced by Random Discrete Dopant, Interface Trap and Work Function,” The 3rd International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, p. 105.
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Wen-Tsung Huang, Cheng-Hao Huang, Pei-Jung Chao, Sheng-Chin Hung, and Yiming Li*, “Random Dopant Fluctuation of Trapezoidal HKMG Bulk FinFET Devices,” The 3rd International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, p. 126.
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Sheng-Chia Hsu, Cheng-Hao Huang, Pei-Jung Chao, Sheng-Chin Hung, and Yiming Li*, “Characteristic Fluctuation between N-/P-Type 16-nm-Gate High-κ/Metal Gate Bulk FinFET and Planar MOSFET Devices in the Presence of Random Interface Traps,” International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, p. 105.
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Chien-Hsueh Chiang, and Yiming Li*, “A Novel Design of Pull-Down Structure for High-Performance Amorphous Silicon Gate Driver Circuits in Flat Panel Display Industry,” International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, p. 31.
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Ping-Hsun Su, and Yiming Li*, “Novel Method and Test Structure for Emerging Bulk FinFETs’ Source-and-Drain Series Resistance Measurement and Extraction,” International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, p. 53.
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Seiji Samukawa, Shintaro Ishii, Akio Higo, Yosuke Tamura, Takayuki Kiba, Akihiro Murayama, and Yiming Li, “Full 3D Quantum Energy Level Simulation for GaAs/AlGaAs Quantum Nanodisks Fabricated by Ultimate Top-down Process,” International Symposium on Next-Generation Electronics, Taoyuan, Taiwan, May 7-10, 2014, pp. E1-4.
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Yu-Yu Chen, Wen-Tsung Huang, Sheng-Chia Hsu, Han-Tung Chang, Chieh-Yang Chen, Chin-Min Yang, Li-Wen Chen, and Yiming Li*, “Statistical Device Simulation of Intrinsic Parameter Fluctuation in 16-nm-Gate N- and P-type Bulk FinFETs,” The 13th IEEE International Conference on Nanotechnology (IEEE NANO 2013), Shangrila Hotel, Beijing, China, August 5-8, 2013.
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Chien-Hung Chen, Yiming Li*, Chieh-Yang Chen, Yu-Yu Chen, Sheng-Chia Hsu, Wen-Tsung Huang, and Sheng-Yuan Chu, “Experimentally Effective Clean Process to C-V Characteristic Variation Reduction of HKMG MOS Devices,” The 13th IEEE International Conference on Nanotechnology (IEEE NANO 2013), Shangrila Hotel, Beijing, China, August 5-8, 2013.
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Chieh-Yang Chen, Yiming Li*, Yu-Yu Chen, Han-Tung Chang, Sheng-Chia Hsu, Wen-Tsung Huang, Chin-Min Yang, and Li-Wen Chen, “On Characteristic Variability of 16-nm-Gate Bulk FinFET Devices Induced by Intrinsic Parameter Fluctuation and Process Variation Effect,” Proceedings of 2013 IEEE Device Research Conference (IEEE DRC 2013), The University of Notre Dame, South Bend, IN, June 23-26, 2013, pp.137-138
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Weiguo Hu, Makoto Igarashi, Ming-Yi Lee, Yiming Li*, and Seiji Samukawa, “50% Efficiency Intermediate Band Solar Cell Design Using Highly Periodical Silicon Nanodisk Array,” The 2012 IEEE International Electron Devices Meeting (IEEE IEDM 2012), San Francisco, CA, Dec. 10-12, 2012, pp. 6.1.1-6.1.4.
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Yu-Yu Chen, Chieh-Yang Chen, Tony Chiang, and Yiming Li, “Optimal Power Consumption Design of ASG Driver Circuit for 10.1-inch Display Panel Manufacturing,” The 12th International Meeting on Information Display (IMID 2012), EXCO, Daegu, Korea, Aug. 28-31, 2012.
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Hsin-Wen Su, Yiming Li*, Yu-Yu Chen, Chieh-Yang Chen, and Han-Tung Chang, “Drain-Induced-Barrier Lowering and Subthreshold Swing Fluctuations in 16-nm-Gate Bulk FinFET Devices Induced by Random Discrete Dopants,” Proceedings of 2012 IEEE Device Research Conference (IEEE DRC 2012), The Pannsylvania State University, University Park, PA, USA, June 18-20, 2012, pp.109-110.
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Yiming Li*, Hui-Wen Cheng, Yung-Yueh Chiu, Chun-Yen Yiu, and Hsin-Wen Su, “A Unified 3D Device Simulation of Random Dopant, Interface Trap and Work Function Fluctuations on High-/Metal Gate Device,” The 2011 IEEE International Electron Devices Meeting Technical Digest (IEEE IEDM 2011), Washington, DC, USA, Dec. 5-7, 2011, pp. 5.5.1-5.5.4.
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Cheng-Han Shen, I-Hsiu Lo, Po-Jui Lin, and Yiming Li*, “Threshold Voltage Dependence on the Temperature of a-Si:H TFTs and its Implication on Integrated Gate Driver Circuit,” Proceedings of 11th International Meeting on Information Display (IMID 2011), KINTEX, Seoul, Korea, Oct. 11-15, 2011, pp. 245-246.
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Po-Jui Lin, I-Hsiu Lo, Yiming Li*, and Cheng-Han Shen, “A Novel Amorphous Silicon TFT Gate Driver Circuit with Optimized Design for Integrated Display Panel Manufacturing,” Proceedings of 11th International Meeting on Information Display (IMID 2011), KINTEX, Seoul, Korea, Oct. 11-15, 2011, pp. 78-79.
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Yung-Yueh Chiu, Yiming Li* and Hui-Wen Cheng, “Random Interface-Traps-Induced Characteristic Fluctuation in 16-nm High-к/Metal Gate CMOS Device and Digital Circuit,” Proceedings of 2011 International Conference on Solid State Devices and Materials (SSDM 2011), Aichi Industry & Labor Center (WINC AICHI), Nagoya, Japan, Sep. 28-30, 2011, pp. 126-127.
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Hui-Wen Cheng, Yiming Li*, Chun-Yen Yiu, and Hsin-Wen Su, “Nanosized Metal Grains Induced Electrical Characteristic Fluctuation in 16 nm Bulk and SOI FinFET Devices with TiN/HfO2 Gate Stack,” Proceedings of 2011 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2011), September 8-10, 2011, Hotel Hankyu Expo Park, Osaka, JAPAN, pp. 287-290.
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Cheng-Han Shen, Yiming Li*, I-Hsiu Lo, Po-Jui Lin, and Sheng-Chuan Chung, “Modeling Temperature and Bias Stress Effect on Threshold Voltage of a-Si:H TFTs for Gate Driver Circuit Simulation,” Proceedings of 2011 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2011), September 8-10, 2011, Hotel Hankyu Expo Park, Osaka, JAPAN, pp. 251-254.
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Hui-Wen Cheng, Fu-Hai Li, Ming-Hung Han, Chun-Yen Yiu, Chia-Hui Yu, Kuo-Fu Lee, and Yiming Li*, “3D Device Simulation of Work-Function and Interface Trap Fluctuations on High-k/Metal Gate Devices,” Proceedings of the 2010 IEEE International Electron Devices Meeting (IEEE IEDM 2010), California, USA, Dec. 6-8, 2010, pp. 379-382.
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I-Hsiu Lo, Yiming Li*, Kuo-Fu Lee, Tony Chiang, Kuen-Yu Huang, and Tsau-Hua Hsieh, “Highly Optimized Electrical Characteristics of a-Si TFT Gate Driver for Display Panel Manufacturing,” Proceedings of International Meeting on Information Display (IMID 2010), Seoul, Korea, Oct. 11-15, 2010, pp. 114-115.
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Kuo-Fu Lee, Yiming Li*, Chun-Yen Yiu, and Thet-Thet Khaing, “Effective Suppression of Random-Dopant-Induced Characteristic Fluctuation Using Dual Material Gate Technique for 16 nm MOSFET Devices,”Proceedings of 2010 International Conference on Solid State Devices and Materials (SSDM 2010), Tokyo, Japan, Sep. 22-24, 2010, pp. 697-698.
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Yiming Li*, Chun-Yen Yiu, Ming-Hung Han and Hui-Wen Cheng, “Nanosized-Metal-Grain-Induced Characteristic Fluctuation in 16-nm CMOS Devices,” Proceedings of 2010 International Conference on Solid State Devices and Materials (SSDM 2010), Tokyo, Japan, Sep. 22-24, 2010, pp. 305-306.
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Ying-Chieh Chen and Yiming Li*, “Inverse Doping Profile of MOSFETs via Geometric Programming,” Proceedings of Scientific Computing in Electrical Engineering (SCEE 2010), Toulouse, France, Sep. 19-24, 2010, pp. 95-98.
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Chia-Hui Yu, Ming-Hung Han, Hui-Wen Cheng, Zhong-Cheng Su, Yiming Li* and Hiroshi Watanabe, “Statistical Simulation of Metal-Gate Work-Function Fluctuation in High-K/Metal-Gate CMOS Devices,” Proceedings of IEEE 15th International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2010), Bologna, Italy, Sep. 6-8, 2010, pp. 153-156.
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Chun-Yen Yiu, Yiming Li*, Ming-Hung Han, Kuo-Fu Lee, Thet-Thet Khaing, Hui-Wen Cheng, and Zhong-Cheng Su, “Effect of Intrinsic-Parameter Fluctuations on 16-nm-Gate CMOS and Current Mirror Circuit,” Proceedings of The IEEE 10th International Conference on Nanotechnology (IEEE NANO 2010), Seoul, Korea, Aug. 17-20, 2010, pp. 798-801.
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Hui-Wen Cheng, Hsuan-Ming Huang, Yiming Li*, Tseng-Chien Tsai, Hung-Yu Chen, Kuen-Yu Huang, and Tsau-Hua Hsieh, “An Optimal Design for Power Consumption of 2.2” ~ 2.6” Display System of Mobile Phone,” Proceedings of International Meeting on Information Display (IMID 2009), Kintex, Seoul, Korea, Oct. 12-16, 2009, pp. 968-971.
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Yao-Jen Lee, Yu-Lun Lu, Fu-Kuo Hsueh, Kuo-Chin Huang, Chia-Chen Wan, Tz-Yen Cheng, Ming-Hung Han, Jeff M. Kowalski, Jeff E. Kowalski, Dawei Heh, Hsi-Ta Chuang, Yiming Li, Tien-Sheng Chao, Ching-Yi Wu, and Fu-Liang Yang, “3D 65nm CMOS with 320°C Microwave Dopant Activation,” 2009 IEEE International Electron Devices Meeting Technical Digest (IEEE IEDM 2009), Baltimore, MD, USA, Dec. 7-9, 2009, pp. 1-4.
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Tien-Yeh Li, Chih-Hong Hwang, and Yiming Li*, “Random-Dopant-Induced Static Noise Margin Fluctuation and Suppression in 16-nm-Gate CMOS SRAM Cell,” Proceedings of The 2009 International Conference on Solid State Devices and Materials (SSDM 2009), Sendai Kokusai Hotel, Miyagi, Japan, Oct. 7-9, 2009, pp. 1056-1057.
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Hui-Wen Cheng, Chih-Hong Hwang, and Yiming Li*, “Characteristic Sensitivity of Multi-Gate and Multi-Fin MOSFETs to Random Dopant Fluctuation and Implication for Digital Circuits,” Proceedings of The 2009 International Conference on Solid State Devices and Materials (SSDM 2009), Sendai Kokusai Hotel, Miyagi, Japan, Oct. 7-9, 2009, pp. 812-813.
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Ming-Hung Han, Chih-Hong Hwang, and Yiming Li*, “Intrinsic-Parameter-Fluctuated Power-Delay Characteristics in 16-nm-Metal-Gate CMOS Devices and Circuit,” Proceedings of The 2009 International Conference on Solid State Devices and Materials (SSDM 2009), Sendai Kokusai Hotel, Miyagi, Japan, Oct. 7-9, 2009, pp. 404-405.
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Chih-Hong Hwang, Tien-Yeh Li, Ming-Hung Han, Kuo-Fu Lee, Hui-Wen Cheng, and Yiming Li*, “Statistical Analysis of Metal Gate Workfunction Variability, Process Variation, and Random Dopant Fluctuation in Nano-CMOS Circuits,” Proceedings of The 2009 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2009), Hotel Del Coronado, San Diego, California, USA, Sept. 9-11, 2009, pp.1-4.
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Kartika Chandra Sahoo, Yiming Li*, Edward Yi Chang, Men-Ku Lin, and Jin-Hua Huang, “Reflectance of Sub-Wavelength Structure on Silicon Nitride for Solar Cell Application,” Proceedings of The 2009 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2009), Hotel Del Coronado, San Diego, California, USA, Sept. 9-11, 2009, pp.1-4.
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Kartika Chandra Sahoo, Yiming Li*, Men-Ku Lin, Edward Yi Chang, and Jin-Hua Huang, “Design and Fabrication of Sub-Wavelength Structure on Silicon Nitride for Solar Cells,” Proceedings of The 9th IEEE International Conference on Nanotechnology (IEEE-NANO’09), Genoa, Italy, July 26-30, 2009, pp. 109-112.
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Yiming Li*, Chih-Hong Hwang, Ta-Ching Yeh, and Ming-Hung Han, “Simulation of Electrical Characteristic Fluctuation in 16-nm FinFETs and Circuits,” Proceedings of The IEEE Device Research Conference (IEEE DRC 2009), Penn State University, PA, USA, June 22-24, 2009, pp. 139-140.
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Ta-Ching Yeh, Hsuan-Ming Huang, and Yiming Li*, “Sensitivity Analysis of Capacitance for a TFT-LCD Pixel,” Accepted by The 7th International Conference on Scientific Computing in Electrical Engineering (SCEE 2008), Helsinki University of Technology, Filand, Sept. 28 - Oct. 3, 2008.
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Chih-Hong Hwang, Ta-Ching Yeh, Tien-Yeh Li, and Yiming Li*, “Large-Scale Atomistic Circuit-Device Coupled Simulation of Intrinsic Fluctuations in Nanoscale Digital and High-Frequency Integrated Circuits,” Accepted by The 7th International Conference on Scientific Computing in Electrical Engineering (SCEE 2008), Helsinki University of Technology, Filand, Sept. 28 - Oct. 3, 2008
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Yi-Ting Kuo and Yiming Li*, “A Simulation-Based Genetic Algorithm for Optimal Antenna Pattern Design,” Accepted by The 7th International Conference on Scientific Computing in Electrical Engineering (SCEE 2008), Helsinki University of Technology, Filand, Sept. 28 - Oct. 3, 2008
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Yiming Li*, Chih-Hong Hwang, Ta-Ching Yeh, Hui-Wen Cheng, and Tien-Yeh Li, “Discrete Dopant Fluctuated Transient Behavior in 16-nm-Gate CMOS,” The 2008 International Conference on Solid State Devices and Materials (SSDM 2008), Tsukuba International Congress Center (EPOCHAL TSUKUBA), Ibaraki, Japan, Sept. 23-26, 2008, pp. B-10-5.
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Yiming Li*, Chih-Hong Hwang, Ta-Ching Yeh, and Hsuan-Ming Huang, “Reduction of Discrete-Dopant-Induced High-Frequency Characteristic Fluctuations in Nanoscale CMOS Circuit,” Proceedings of The 2008 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2008), Yumoto Fujiya Hotel, Hakone, JAPAN, Sept. 9-11, 2008, pp. 209-212.
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Yiming Li*, Yi-Ting Kuo, Hsiang-Yu Lo, Hui-Wen Cheng, Ta-Ching Yeh, Mei-Tsao Chiang, and Chi-Neng Mo, “Emission Efficiency Dependence on the Tilted Angle of Nanogaps in Surface Conduction Electron-Emitter,” Proceedings of The 2008 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2008), Yumoto Fujiya Hotel, Hakone, JAPAN, Sept. 9-11, 2008, pp. 205-208.
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Yiming Li*, Chih-Hong Hwang, Yi-Ting Kuo, and Hui-Wen Cheng, “Structure Effect of Cylindrical-Shaped GeSbTe Alloy on Phase Transition in Phase Change Memory,” Proceedings of The 8th IEEE International Conference on Nanotechnology (IEEE-NANO’08), Arlington, Texas, USA, Aug. 18-21, 2008, pp. 350-353.
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Yiming Li*, Yi-Ting Kuo, Hsiang-Yu Lo, Hui-Wen Cheng, Ta-Ching Yeh, Chih-Hong, Hwang, Mei-Tsao Chiang, and Chi-Neng Mo, “Field Emission Dependence on Nanogap Separation in Surface Conduction Electron-Emitter Display,” Proceedings of The 8th IEEE International Conference on Nanotechnology (IEEE-NANO’08), Arlington, Texas, USA, Aug. 18-21, 2008, pp. 81-84.
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Hui-Wen Cheng, Ta-Ching Yeh, Yi-Ting Kuo, and Yiming Li*, Chen-Chun Lin and Fu-Ming Pan, Mei-Tsao Chiang, Kuo-Chung Lo, and Chi-Neng Mo, “Morphology Effect on Field Emission Property of Carbon Nanotube Emitters in Triode Structure,” The 2008 International Society for Information Display Symposium, Seminar and Exhibition (SID-08), Los Angeles Convention Center, Los Angeles, California, May 18-23, 2008, pp. 66-69.
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Chih-Hao Tsai, Fu-Ming Pan, Hsiang-Yu Lo, Yiming Li, Yi-Ting Kuo, Hsueh-Yung (Robert) Chao, Kuo-Chung Lo, Mei-Tsao Chiang, Chi-Neng Mo, “Novel Surface Conduction Electron Emitter (SCE) Nanogaps for Field Emission Displays,” The 2008 International Society for Information Display Symposium, Seminar and Exhibition (SID-08), Los Angeles Convention Center, Los Angeles, California, May 18-23, 2008, pp. 159-162.
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Yiming Li*, Chih-Hong Hwang, Hsuan-Ming Huang, and Ta-ChingYeh, “Discrete-Dopant-Fluctuated Threshold Voltage Roll-Off in Sub-16nm Bulk FinFETs,” The 2007 International Conference on Solid State Devices and Materials (SSDM 2007), Tsukuba International Congress Center, Ibaraki, Japan, Sept. 18-21, 2007, pp.880-881.
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Hsiang-Yu Lo, Yiming Li*, Chih-Hao Tsai, Hsueh-Yung Chao, Fu-Ming Pan, Mei-Chao Chiang, and Chi-Neng Mo, “Experimental and Theoretical Examination of Field Emission in Surface Conduction Electron-Emitter Displays,” The 2007 International Conference on Solid State Devices and Materials (SSDM 2007), Tsukuba International Congress Center, Ibaraki, Japan, Sept. 18-21, 2007. pp. 544-545.
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Yiming Li*, Hui-Wen Cheng, Chen-Chun Lin, and Fu-Ming Pan, “Variation of Field Emission Property of Carbon Nanotube Field Emitters in Triode Structure Fabricated with Anodic Aluminum Oxide Templates,” Accepted by The 2007 International Conference on Solid State Devices and Materials (SSDM 2007), Tsukuba International Congress Center, Ibaraki, Japan, Sept. 18-21, 2007.
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Yiming Li*, Chih-Hong Hwang, Shao-Ming Yu, and Hsuan-Ming Huang, “Discrete dopant induced electrical and thermal fluctuation in nanoscale SOI FinFET,” The 7th IEEE International Conference on Nanotechnology (IEEE-NANO 07), Hong Kong Convention & Exhibition Centre, Hong Kong, China, Aug. 2-5, 2007. pp. 1166-1169.
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Yiming Li*, Jung Y. Huang, Bo-Shian Lee, and Chih-Hong Hwang, “Effect of single grain boundary position on surrounding-gate polysilicon thin film transistors,” The 7th IEEE International Conference on Nanotechnology (IEEE-NANO 07), Hong Kong Convention & Exhibition Centre, Hong Kong, China, Aug. 2-5, 2007, pp. 1148-1151.
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Hsiang-Yu Lo, Yiming Li*, Hsueh-Yung Chao, Chih-Hao Tsai, Fu-Ming Pan, Mei-Chao Chiang, Mai Liu, Ting-Chen Kuo, and Chi-Neng Mo, “Effect of Process Variation on Emission Characteristics in Surface Conduction Electron-Emitter,” The 7th IEEE International Conference on Nanotechnology (IEEE-NANO 07), Hong Kong Convention & Exhibition Centre, Hong Kong, China, Aug. 2-5, 2007, pp.353-356.
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Fu-Liang Yang, Jiunn-Ren Hwang, Hung-Ming Chen, Jeng-Jung Shen, Shao-Ming Yu, Yiming Li, and Denny D. Tang, “Discrete Dopant Fluctuated 20nm/15nm-Gate Planar CMOS,” Technical Digest of The 2007 Symposium on IEEE VLSI Technology (IEEE VLSI 2007), Kyoto, Japan, June 12-14, 2007, pp.208-209.
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Hsiang-Yu Lo, Yiming Li*, Hsueh-Yung Chao, Chih-Hao Tsai and Fu-Ming Pan, Ting-Chen Kuo, Mei Liu, and Chi-Neng Mo, “Three-Dimensional Simulation of Novel Surface Conduction Electron-Emitters,” Digest of The 2007 International Society for Information Display Symposium, Seminar and Exhibition (SID 07), Long Beach, California, U.S.A., May 20-25, 2007, pp. 586-589.
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Chih-Hao Tsai, Kuan-Jung Chen, Fu-Ming Pan, Hsiang-Yu Lo, Yiming Li, Mei Liu, and Chi-Neng Mo, “Nanogap Fabrication on Palladium Electrodes for Field Emission Display Applications,” Digest of The 2007 International Society for Information Display Symposium, Seminar and Exhibition (SID 07), Long Beach, California, U.S.A., May 20-25, 2007, pp. 583-585.
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Yiming Li* and Shao-Ming Yu, “Random Dopant-Induced Fluctuations of Electrical Characteristics in Nanoscale Single- and Double-Gate MOSFETs,” Book of Abstract of The 6th International Conference of Scientific Computing in Electrical Engineering (SCEE 2006), Sinaia, Romania, Sept. 17-22, 2006, pp. 154-155.
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Yiming Li*, “Application of A Unified Optimization Framework to Electronic Designs,” Book of Abstract of The 6th International Conference of Scientific Computing in Electrical Engineering (SCEE 2006), Sinaia, Romania, Sept.17-22, 2006, pp. 86-87.
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Yiming Li*, Chien-Sung Lu, Wan-Wen Lo, Meng-Jia Tsai, and Tung-Yu Wu, “Sensitivity Analysis of Static Noise Margin in SRAM Cells with 65 nm CMOS Devices,” Book of Abstract of The 6th International Conference of Scientific Computing in Electrical Engineering (SCEE 2006), Sinaia, Romania, Sept. 17-22, 2006, pp. 21-22.
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Yiming Li*, “A Hybrid Intelligent Computational Methodology for Semiconductor Device Equivalent Circuit Model Parameter Extraction,” Presented in The Summer School of Scientific Computing in Electrical Engineering ’05 -- Computational Methods for Microelectronics (SCEE 2005), Capo D'Orlando, Italy, Sept. 5-17, 2005.
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Yiming Li*, Shao-Ming Yu, and Ching-Feng Hsiao, “Comparison of Random Dopant-Induced Threshold Voltage Fluctuations in Nanoscale Single-, Double-, and Surrounding-Gate Field Effect Transistors,”The 2005 International Conference on Solid State Devices and Materials (SSDM 2005), Kobe, Japan, Sept. 12-15, 2005, pp. 594-595.
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Yiming Li*, Hung-Mu Chou, Bo-Shian Lee, Chien-Sung Lu, and Shao-Ming Yu, “Computer Simulation of Germanium Nanowire Field Effect Transistors,” Proceedings of The 2005 IEEE International Conference on Simulation of Semiconductor Processes and Devices (IEEE SISPAD 2005), Komaba Eminence, Tokyo, JAPAN, Sep. 1-3, 2005, pp. 227-230.
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Yiming Li*, Shao-Ming Yu, and Jam-Wem Lee, “Quantum Mechanical Corrected SPICE Model for Ultrathin Oxide MOSFETs' Gate Tunneling Current Simulation,” Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials (SSDM 2004), Tokyo, Japan, September 15-17, 2004, pp. 738-739.
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Jam-Wem Lee, Yiming Li*, and H. Tang, “Effective Electrostatic Discharge Protection Circuit Design using Novel Full-Silicided N-MOSFETs in Sub-100 nm era,” Proceedings of The Fourth IEEE Conference on Nanotechnology (IEEE NANO 04), Audimax-TU München, Munich, Germany, August 16-19, 2004, pp. 605-607.
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Chien-Shao Tang, Shao-Ming Yu, Hong-Mu Chou, Jam-Wem Lee, and Yiming Li*, “Simulation of Electrical Characteristics of Surrounding- and Omega-Shaped-Gate Nanowire FinFETs,” Proceedings of The Fourth IEEE Conference on Nanotechnology (IEEE NANO 04), Audimax-TU München, Munich, Germany, August 16-19, 2004, pp. 281-283.
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Fu-Liang Yang, Di-Hong Lee, Hou-Yu Chen, Chang-Yun Chang, Sheng-Da Liu, Cheng-Chuan Huang, Tang-Xuan Chung, Hung-Wei Chen, Chien-Chao Huang, Yee-Chia Yeo, Yiming Li, Jam-Wem Lee, and Pu Chen, Mong-Song Liang, and Chenming Hu, “5nm-Gate Nanowire FinFET," The 2004 Symposium on VLSI Technology (IEEE VLSI 2004), Honolulu, Hawaii, USA, June 15-19, 2004, pp. 196-197.
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Jam-Wem Lee, Alice Chao, Yiming Li*, and Howard Tang, “A Study of ESD Protection under Pad Design for Copper-Low K VLSI Circuits," Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials (SSDM 2003), Tokyo, Japan, Sep. 16-18, 2003, pp. 672-673.
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Yiming Li*, Shao-Ming Yu, Chien-Shao Tang, and Tien-Sheng Chao, “Comparison of Quantum Correction Models for Ultratin Oxide Single- and Double-Gate MOS Structures Under the Inversion Conditions," Proceedings of the 2003 Third IEEE Conference on Nanotechnology (IEEE-NANO 03), San Francisco, CA, Aug. 12-14, 2003, Vol. 2, pp. 36-39.
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Yiming Li*, Hsiao-Mei Lu, and Oleksandr Voskoboynikov, “Geometric Variations and Magnetic Field Effects on Electron Energy States and Magnetization of InAs/GaAs Quantum Rings,"Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials (SSDM 2002), Nagoya Congress Center, Nagoya, Japan, 17-19 Sep., 2002, pp. 574-575.
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Yiming Li*, Yen-Yu Cho, Chuan-Sheng Wang, and Kuen-Yu Huang, “A Genetic Algorithm Approach to InGaP/GaAs HBT Parameters Extraction and RF Characterizations," Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials (SSDM 2002), Nagoya Congress Center, Nagoya, Japan, 17-19 Sep., 2002, pp. 640-641.
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Yiming Li*, Jam-Wem Lee, and Simon M. Sze, “An Optimization of the Anti-punchthrough Implant for ESD Protection Circuit Design," Extended Abstracts of the 2002 International Conference on Solid State Devices and Materials (SSDM 2002), Nagoya Congress Center, Nagoya, Japan, 17-19 Sep., 2002, pp. 394-395.
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Horng-Chih Lin, Meng-Fan Wang, Fu-Ju Hou, Jan-Tsai Liu, Yiming Li*, Tiao-Yuan Huang, and Simon M. Sze, “Effects of Sub-gate Bias on the Operation of Schottky-Barrier SOI MOSFETs Having Nano-scale Channel," Proceedings 2002 the 2nd IEEE Conference on Nanotechnology (IEEE-NANO 02), Hilton Crystal City at National Airport, Arlington, VA, USA, 26-28 Aug., 2002, pp. 205-208.
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Yiming Li*, Hsiao-Mei Lu, Oleksandr Voskoboynikov, Chien-Ping Lee, and Simon M. Sze, “Energy Structure and Magnetization Effect of Semiconductor Quantum Rings," Proceedings 2002 the 2nd IEEE Conference on Nanotechnology (IEEE-NANO 02), Hilton Crystal City at National Airport, Arlington, VA, USA, 26-28 Aug., 2002, pp. 67-70.
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Yiming Li* and Chuan-Sheng Wang, “A Time Domain Approach to High Frequency Circuit Simulation," Book of Reviewed Abstracts of Scientific Computing in Electrical Engineering 2002 Conference (SCEE 2002), Eindhoven, The Netherlands, 23-28 June, 2002, pp. 199-200.
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Yiming Li*, Oleksandr Voskoboynikov, Chien-Ping Lee, Cheng-Feng Shih, Simon M. Sze, and Oleg Tretyak, “Magnetic field dependence of electron energy states in 3D nano-scopic quantum rings," Proceedings of 2001 The 1st IEEE Conference on Nanotechnology (IEEE-NANO 01), Hawaii, 28-30 Oct., 2001, pp. 11-16.
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